mdzcpa
07-14-2002, 09:46 AM
Some interesting details of AMD's upcoming Barton are beginning to surface. It's seems the final interation of the K7 processor will be sporting 128k of L1 cache and 512k of L2. Bus speeds are not reported to be changing.
See the full story here. (http://www.theinquirer.net/?article=4403) .
See the full story here. (http://www.theinquirer.net/?article=4403) .